1. Field of the Invention
The present disclosure relates to a multilayer wiring board having no core board but a laminated structure in which a conductor layer and an insulating layer are alternately laminated into a multilayer.
2. Description of Related Art
In recent years, a semiconductor integrated circuit device (an IC chip) to be used as a microprocessor of a computer has increasingly been enhanced in a speed and a function, and incidentally, there is a tendency that the number of terminals is increased and a pitch between the terminals is also reduced. In general, a large number of terminals are densely disposed in an array on a bottom face of the IC chip, and the terminal group is connected to that on a mother board side in a configuration of a flip chip. However, a great difference is made in a pitch between the terminals on the IC chip and the mother board side. Therefore, it is hard to directly connect the IC chip onto the mother board. For this reason, there is usually employed a technique for fabricating a package having the IC chip mounted on an IC chip mounting wiring board and mounting the package on the mother board.
For the IC chip mounting wiring board constituting the package of this type, there has been practically used a multilayer wiring board having buildup layers formed on a surface and a back face of a core board. In the multilayer wiring board, a resin board (such as a glass epoxy board) obtained by impregnating a reinforcing fiber with a resin is used for the core board, for example. By utilizing a rigidity of the core board, an insulating layer and a conductor layer are alternately laminated on a surface and a back face of the core board so that buildup layers are formed. In other words, in the multilayer wiring board, the core board plays a part in a reinforcement and is formed much more thickly than the buildup layers. Moreover, a wiring for conducting the buildup layers formed on the surface and the back face is provided to penetrate the core board (more specifically, a through hole conductor).
In recent years, a signal frequency to be used has been present in a radio frequency band with an increase in a speed of a semiconductor integrated circuit device. In this case, the wiring penetrating the core board contributes as a high inductance so that a transmission loss of a radio frequency signal or a circuit malfunction is caused, resulting in a disturbance of the increase in the speed. In order to solve the problem, a coreless wiring board having no core board has been proposed as an IC chip mounting wiring board (for example, see JP-B-3635219 and JP-B-3841079). Referring to the coreless wiring board, a comparatively thick core board is omitted so that a whole wiring length is reduced. Therefore, the transmission loss of the radio frequency signal is reduced so that the semiconductor integrated circuit device can be operated at a high speed.
Since the coreless wiring board is manufactured through the omission of the core board, however, a strength thereof cannot be maintained sufficiently. Accordingly, the coreless wiring board is apt to be warped. There is a high possibility that an adhesion failure or a via slip-off of a via conductor for connecting the conductor layers in the buildup layer might be caused in the case in which an excessive stress is applied to the wiring board due to the warpage. As a result, a product yield of the coreless wiring board is deteriorated.